High speed empty flag generator
US6097656A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 26, 1999 |
| Grant date | Aug 1, 2000 |
| Priority date | — |
| Expiry date | Mar 26, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F5/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a high speed empty flag generator and a method of generating a high speed empty flag which are achieved by generating a pre-empty flag in a clock ahead of a read address which is identical to a write address and by generating an empty flag as soon as a read address identical to the write address is generated after an elapse of one clock. The present invention includes a subtracter generating upper N-1 bits of a value resulted from subtracting 1 from a write address of N bits, a pre-empty flag generator generating an pre-empty flag when an output of upper N-1 bits of a rear address of N bits and an output of N-1 bits of the subtracter coincide by comparison, and a main empty flag receiving said pre-empty flag wherein the main empty flag generator generating an empty flag at a generating point of a first read signal after the pre-empty flag.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.