Phase detector for carrier recovery in a DQPSK receiver
US6097768A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 12, 1997 |
| Grant date | Aug 1, 2000 |
| Priority date | — |
| Expiry date | Nov 12, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2027/0067
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A phase detector using simple arithmetic operations to measure phase errors in the carrier-recovery mechanism for a DQPSK digital communications receiver. The carrier-recovery mechanism is a feedback loop that provides a synchronization between the oscillators in the transmitter and receiver of the communications system; the phase detector measures deviations from this synchronization and generates a phase-error signal used in the feedback loop to synchronize the oscillators. To perform this measurement, the phase detector takes the received signal as input and compares it against a local oscillator in the receiver to generate two digital signals: the in-phase (I) and quadrature-phase (Q) components of the received signal. These signals are the input to a logic unit, which uses these two signals to determine the phase-error signal. In one embodiment of the phase detector, the logic unit analyzes the signs of the two digital signals and then accordingly adds or subtracts the I and Q signals to generate the phase-error signal. In another embodiment, the logic unit determines the magnitude of the phase-error signal by finding the difference in magnitudes of the two digital signals and…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.