A-D converter
US6100837A · kind A · utility
7Cited by
2References
10Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 8, 1998 |
| Grant date | Aug 8, 2000 |
| Priority date | — |
| Expiry date | Jul 8, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/249
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A chopper compare circuit of an A-D converter implemented through a semiconductor integrated circuit is provided with a series-connected body of a plurality of MOS capacitors to which the voltage of an analog signal and a reference voltage are alternately applied. A-D conversion errors resulting from change of the capacitances of the MOS capacitors depending on voltages between both electrodes thereof are reduced. A MOS capacitor is connected in parallel with or disconnected from a MOS capacitor, in response to a voltage across electrodes of a MOS capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.