Nonvolatile semiconductor memory device with a level shifter circuit
US6101126A · kind A · utility
8Cited by
2References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 7, 1998 |
| Grant date | Aug 8, 2000 |
| Priority date | — |
| Expiry date | Oct 7, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nonvolatile semiconductor device which includes a word line, a bit line, and a memory cell connected to the word line and the bit line, also has a word line driving circuit for driving the word line with a word line voltage supplied in response to a shut off signal in accordance with each mode of operation, and a circuit for generating the shut off signal during each mode of operation. The circuit generates the shut off signal which has a power supply voltage when the word line voltage is higher than the power supply voltage, and has the word line voltage when the word line voltage is less than the power supply voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.