Dynamic random access memory
US6101148A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 6, 1997 |
| Grant date | Aug 8, 2000 |
| Priority date | — |
| Expiry date | Aug 6, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/401
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A dynamic random access memory includes a dynamic memory cell having a transfer N-channel MOS transistor and a capacitive element for storing data which is connected to the transfer N-channel MOS transistor, a word line connected to a gate of the transfer N-channel transistor, of the dynamic memory cell, and a word line driving voltage source, to which power voltage is input for raising the input power voltage to generate a word line driving voltage. Also, the dynamic random access memory includes an address circuit for generating internal address signals in accordance with externally input address signals, a word line selecting circuit for decoding the internal address signals and outputting a word line selecting signal which varies within a range between the word line driving voltage and a ground potential, and a word line driving circuit for driving a corresponding word line in accordance with the word line selecting signal, the word line driving circuit being provided in correspondence with the word line and having a P-channel MOS transistor which has a source connected to a first node having the word line driving voltage, a drain connected to the word line and a gate to which …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.