System for context switching between processing elements in a pipeline of processing elements
US6101599A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 29, 1998 |
| Grant date | Aug 8, 2000 |
| Priority date | — |
| Expiry date | Jun 29, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/3063
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and technique facilitate fast context switching among processor complex stages of a pipelined processing engine. Each processor complex comprises a central processing unit (CPU) core having a plurality of internal context switchable registers that are connected to respective registers within CPU cores of the pipelined stages by a processor bus. The technique enables fast context switching by sharing the context switchable registers between upstream and downstream CPUs to, inter alia, force program counters into the downstream registers. In one aspect of the inventive technique, the system automatically reflects (shadows) the contents of an upstream CPU's context switchable registers at respective registers of a downstream CPU over the processor bus. In another aspect of the invention, the system redirects instruction execution by the downstream CPU to an appropriate routine based on processing performed by the upstream CPU.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.