Trench forming process and integrated circuit device including a trench
US6103635A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 28, 1997 |
| Grant date | Aug 15, 2000 |
| Priority date | — |
| Expiry date | Oct 28, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/3065
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for forming a trench in a semiconductor material is provided. The process includes (a) providing a semiconductor substrate, a first mask layer adjacent the surface of the semiconductor substrate, and a second mask layer adjacent the surface of the first mask layer, the second mask layer defining a first open area and the first mask layer defining a second open area that is larger than the first open area and aligned therewith in a manner so that in the area of the openings the first mask layer is undercut with respect to the second mask layer; and (b) removing a portion of the semiconductor substrate through the open area defined by the second mask layer to form a trench in said semiconductor substrate. An IC device formed using the process is also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.