Method and system for improved memory interface during image rendering
US6104418A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 6, 1998 |
| Grant date | Aug 15, 2000 |
| Priority date | — |
| Expiry date | Apr 6, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T1/60
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Aspects for increasing efficiency of memory accesses during graphics rendering are provided. A preferred method aspect includes providing a plurality of memory banks for data, and decoding input signals that indicate accessing of at least one of the plurality of memory banks for a desired plurality of words of data. The method further includes splitting data access across the plurality of memory banks to allow parallel selection of an output from at least one of the plurality of memory banks as the desired plurality of words of the data, wherein latency of data access is amortized. A system aspect for improving data transfer from memory to a texture mapping unit includes a plurality of cache banks for storing texel data, a bank decode unit coupled to the plurality of cache banks for decoding a plurality of input signals indicative of selection of texel data from one or more of the plurality of banks, and selection control logic for receiving decoded address data from the bank decode unit and controlling selection of the plurality of cache banks to retrieve the texel data for output to the texture mapping unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.