Level converting circuit
US6107857A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 23, 1998 |
| Grant date | Aug 22, 2000 |
| Priority date | — |
| Expiry date | Jan 23, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/018521
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A level converting circuit converts the level of an input signal to a positive or a negative level according to a power source voltage for supplying a voltage of a reference level for the input signal. In the level converting circuit, a first transistor has a source supplied with a first voltage, and a drain supplied with a second voltage via a loading circuit. Conduction and cutoff of the first transistor is determined on the basis of the signal level of an input signal supplied via a signal input terminal. The drain voltage is supplied as a signal to an output circuit. The output circuit is supplied via a power source terminal with a third voltage, and via another power source terminal with a fourth voltage. Conduction and cutoff of a transistor of the output circuit is determined on the basis of the signal level of the signal supplied to the output circuit, and the third and fourth voltages are selectively outputted as an output signal of the output circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.