System for implementing hardware automated control of burst mode data transfer over a communication link between devices operating in a block mode
US6108723A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 20, 1998 |
| Grant date | Aug 22, 2000 |
| Priority date | — |
| Expiry date | Jul 20, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Burst-mode data transfers between a SCSI host bus adapter and at least one SCSI bus device interface adapter are implemented by hardware. For a first embodiment of the invention, the device interface adapter is equipped with a first, second and third data registers, a comparator, a subtractor, and control logic in the form of an application specific integrated circuit. When a burst-mode transfer is requested, the first register is programmed with a value corresponding to the length of the transfer in bytes, and the second register is programmed with the maximum possible number of bytes in a burst. The comparator then compares the value in stored in the first register with the value stored in the second register and determines which is the smaller. The smaller of the two values is written to the third register. The subtractor then subtracts said third value from said first value to obtain a remainder value. The first value is then replaced with a new first value equal to said remainder value. The control logic orchestrates the steps of comparing said first and second values, storing the smaller of said first and second values in said third register, subtracting said third value from…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.