Single wire data communication method
US6108751A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 22, 1999 |
| Grant date | Aug 22, 2000 |
| Priority date | — |
| Expiry date | Jul 22, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/41
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system architecture which provides efficient data communication, over a one-wire bus, with a portable data module which does not necessarily include any accurate time base whatsoever. The time base in the module can be extremely crude (e.g. more than 4:1 uncertainty). An open-collector architecture is used, with electrical relations defined to absolutely minimize the drain on the portable module's battery. The protocol has been specified so that the module never sources current to the data line, but only sinks current. The protocol includes signals for read; write-zero; write-one; and reset. Each one-bit transaction is initiated by a falling edge from the host. The time base in the module defines a delay, after which (in write mode) the module tests the data state of the data line. In read mode, after a falling edge the module does or does not turn on its pull-down transistor, depending on the data value. Thus, the host system, after the falling edge, attempts to pull the data line high again, and then tests the potential of the data line to ascertain the data value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.