Testing method and apparatus for first-in first-out memories
US6108802A · kind A · utility
8Cited by
7References
28Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 25, 1998 |
| Grant date | Aug 22, 2000 |
| Priority date | — |
| Expiry date | Mar 25, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/003
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A variety of FIFOs, including single and dual port, RAM-type and/or having a ring-type addressing mechanism, are tested by causing the FIFOs to execute a test method comprised of a series of steps. Upon execution, the steps cause the FIFO to manifest a variety of faults. This test method manifests faults by monitoring the outcome of operations and the values of particular flags indicative of normal FIFO operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.