Concurrent hardware-software co-synthesis of hard real-time aperiodic and periodic specifications of embedded system architectures
US6110220A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 17, 1998 |
| Grant date | Aug 29, 2000 |
| Priority date | — |
| Expiry date | Feb 17, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Hardware-software co-synthesis of an embedded system requires mapping of its specifications into hardware and software modules such that its real-time and other constraints are met. Embedded system specifications are generally represented by acyclic task graphs. Many embedded system applications are characterized by aperiodic as well as periodic task graphs. Aperiodic task graphs can arrive for execution at any time and their resource requirements vary depending on how their constituent tasks and edges are allocated. Traditional approaches based on a fixed architecture coupled with slack stealing and/or on-line determination of how to serve aperiodic task graphs are not suitable for embedded systems with hard real-time constraints, since they cannot guarantee that such constraints would always be met. The present invention addresses the problem of concurrent co-synthesis of aperiodic and periodic specifications of embedded systems. The algorithm estimates the resource requirements of aperiodic task graphs and allocates execution slots on processing elements and communication links for executing them. The present approach guarantees that the deadlines of both aperiodic and periodic …
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