Repeater blocks adjacent clusters of circuits
US6110221A · kind A · utility
23Cited by
10References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 23, 1997 |
| Grant date | Aug 29, 2000 |
| Priority date | — |
| Expiry date | Jun 23, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention organizes the circuits on a VLSI chip into clusters. A number of channels exist in-between the clusters. Blocks of repeaters are used in a linear array, and are placed adjacent the edges of the clusters where repeaters are estimated to be needed. The repeater cells themselves are preferably formed to have a width less than or equal to the width of a line track for routing lines such that an array of repeater cells can be lined up with an array of routing lines in a bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.