Graphic editor for block diagram level design of circuits
US6110223A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 27, 1997 |
| Grant date | Aug 29, 2000 |
| Priority date | — |
| Expiry date | Oct 27, 2017 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S707/99954
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method is described herein for designing a circuit using graphic editor software. A graphic design file is generated corresponding to a block diagram created in a graphical user interface associated with the graphic editor software. The block diagram includes a plurality of blocks and a plurality of conduits interconnecting the blocks. A block design file is generated in one of a plurality of formats for each of selected ones of the plurality of blocks in the block diagram. Each of the block design files corresponds to an implementation of its corresponding block. Modifications to any of the graphic design file and the block design files are incorporated into each other under software control.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.