Low jitter timing recovery technique and device for asynchronous transfer mode (ATM) constant bit rate (CBR) payloads
US6111878A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 4, 1997 |
| Grant date | Aug 29, 2000 |
| Priority date | — |
| Expiry date | Nov 4, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/5674
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
052440872 An existing synchronous residual time stamp (SRTS) algorithm (76, 78, 80, 82, 106, 104) is used in conjunction with adaptively filtered buffer fill information (74) to reconstruct an original constant bit rate (CBR) payload clock rate (102) for asynchronous transfer mode (ATM) CBR payloads (88, 96). The SRTS time stamp (96) is used as the primary factor used to recover the payload clock rate, but a secondary payload frequency correction factor (112) is generated by filtering (118, 120) the desynchronizer buffer fill position. This correction factor is determined as part of a feedback arrangement which adaptively (128) alters the filtering time constant based on the offset position of the buffer from its center. In this way, payload clock frequency (102) is corrected, even in the presence of loss of synchronization PRS traceability between mapping and desynchronizer nodes to keep the desynchronizer buffer from overflowing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.