Fractional synthesis scheme for generating periodic signals
US6114914A · kind A · utility
34Cited by
6References
14Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 19, 1999 |
| Grant date | Sep 5, 2000 |
| Priority date | — |
| Expiry date | May 19, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/18
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An apparatus comprising a first circuit, a second circuit and a third circuit. The first circuit may be configured to generate an output signal having a first frequency in response to (i) an input having a second frequency and (ii) a first control signal. The second circuit may be configured to generate the second frequency in response to (i) a plurality of third clock signals and (ii) a second control signal. The third circuit may be configured to present the first and second control signals in response to one of said plurality of third clock signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.