Method for fabricating a capacitor for a semiconductor memory configuration

US6117790A · kind A · utility

Assignee

• Siemens Aktiengesellschaft · DE

Inventors

• Herbert Schafer · Höhenkirchen-Siegertsbrunn, DE
• Martin Franosch · Munich, DE
• Reinhard Stengl · Stadtbergen, DE
• Gerrit Lange · Denzlingen, DE
• Hans Reisinger · Grünwald, DE
• Hermann Wendt · Grasbrunn, DE
• Volker Lehmann · Hersbruck, DE

Key dates

• Filing date: Apr 30, 1999
• Grant date: Sep 12, 2000
• Expiry date: Apr 30, 2019

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D1/711

Abstract

A method for fabricating a capacitor for a semiconductor memory configuration. In this case, a selectively etchable material is applied to a conductive support, which is connected to a semiconductor body via a contact hole in an insulator layer, and patterned. A first conductive layer is applied thereon and patterned. A hole is introduced into the first conductive layer, through which hole the selectively etchable material is etched out. A cavity is produced under the first conductive layer in the process. The inner surface of the cavity and the outer surface of the first conductive layer are provided with a dielectric layer, to which a second conductive layer is applied and patterned.