Polysilicon coated nitride-lined shallow trench
US6118167A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 13, 1997 |
| Grant date | Sep 12, 2000 |
| Priority date | — |
| Expiry date | Nov 13, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76224
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A polycrystalline silicon coated nitride-lined shallow trench technique for isolating active regions on an integrated circuit involves reducing the oxide encroachment and the "bird's beak" structure. The technique involves forming an isolation trench, or recess, in the substrate. This recess is then lined with a layer of silicon dioxide layer, and then a layer of silicon nitride. Subsequently, a polycrystalline silicon material is deposited in the recess and is then oxidized to form a field oxide and planarized. Since the recess is nitride-lined, which prevents oxidizing species from reaching the oxide layer beneath the nitride layer, and the polycrystalline silicon is oxidized, the result is zero oxide encroachment resulting in the elimination of the "bird's beak" structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.