Integrated circuit I/O buffer having pass gate protection with RC delay
US6118303A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 17, 1998 |
| Grant date | Sep 12, 2000 |
| Priority date | — |
| Expiry date | Apr 17, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/00315
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An integrated circuit I/O buffer has an output driver. The output driver includes first, second and third voltage supply terminals and a pad terminal. A pad pull-up transistor is coupled in series between the first voltage supply terminal and the pad terminal and has a pull-up control terminal. A pad pull-down transistor is coupled in series between the second voltage supply terminal and the pad terminal and has a pull-down control terminal. A voltage protection transistor is coupled between the pad terminal and the pad pull-down transistor. The voltage protection transistor has a control terminal and a capacitance between the control terminal and the pad terminal. A resistor is coupled in series between the control terminal of the voltage protection transistor and the third voltage supply terminal and forms a resistor-capacitor (RC) circuit with the capacitance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.