Output circuit capable of suppressing bounce effect
US6118311A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 9, 1999 |
| Grant date | Sep 12, 2000 |
| Priority date | — |
| Expiry date | Mar 9, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/167
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In an output circuit including first and second power supply terminals, an input terminal, an output terminal, a first switching element connected between the first power supply terminal and the output terminal and being controlled by an input voltage at the input terminal, and a plurality of second switching elements connected in parallel between the output terminal and the second power supply terminal and being controlled by the input voltage, a third switching element is connected between the output terminal and one of the second switching elements, and a control circuit is rat provided for controlling the third switching element in accordance with an output voltage at the output terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.