Memory cell with a Frohmann-Bentchkowsky EPROM memory transistor that reduces the voltage across an unprogrammed memory transistor during a read
US6118691A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 13, 1999 |
| Grant date | Sep 12, 2000 |
| Priority date | — |
| Expiry date | Aug 13, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2216/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The unintentional programming of a memory cell having a Frohmann-Bentchkowsky p-channel memory transistor and an n-channel MOS access transistor, which can occur during a read operation when high read voltages are used, is eliminated by forming a diode-connected MOS transistor in parallel with the access transistor. The diode-connected transistor is formed to be off when an unprogrammed memory transistor is read, and to be on when a programmed memory transistor is read.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.