Semiconductor memory device using MONOS type nonvolatile memory cell
US6118699A · kind A · utility
7Cited by
3References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 13, 1999 |
| Grant date | Sep 12, 2000 |
| Priority date | — |
| Expiry date | Jul 13, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B69/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
That surface portion of a semiconductor substrate which is adjacent to a buried source region formed in the substrate is covered with an offset side wall to suppress expansion of a channel beneath the offset side wall. In addition, buried source regions in the form of offset side walls are formed on the two sides of a drain region having one non-offset side wall to prevent a write or read error in unselected memory cell transistors on both sides of a selected memory transistor either in a data write or in a data read.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.