Digital clock recovery circuit with phase interpolation
US6122336A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 11, 1997 |
| Grant date | Sep 19, 2000 |
| Priority date | — |
| Expiry date | Sep 11, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0337
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present invention provides a digital clock recovery circuit, which includes a frequency synthesizer generating a number of clock phase signals. The digital clock recovery circuit also includes a phase interpolation unit, which interpolates the clock phase signals from the frequency synthesizer to increase the number of clock phase signals. Additionally, the digital clock recovery circuit also includes a phase detector, a digital filter, and a phase selection unit. The phase detector has an output connected to a digital filter, which is connected to the phase selection unit. The phase detector sends signals filtered through the digital filter to select clock phase signals input into the phase selection unit from the phase interpolation unit. The output of the phase selector provides the recovered clock signal and also connected to the input phase detector.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.