Method and apparatus for maskless semiconductor and liquid crystal display inspection
US6122397A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 3, 1997 |
| Grant date | Sep 19, 2000 |
| Priority date | — |
| Expiry date | Jul 3, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T2207/30148
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Image primitive based maskless semiconductor wafer and liquid crystal display panel inspection by the characterization of wafer patterns. Potential defects are detected as exceptions to the rules of general semiconductor surface pattern structure. The wafer or liquid crystal display, lcd, structure is encoded into multiple profiles of a set of primitive characterization modules. Primitive profiles are correlated with potential defects along with aligned pattern images for surface component to surface component, lcd active matrix element to lcd active matrix element, comparison and further refines the results using data from multiple surface components or lcd active matrix elements. Multiple stage defect classification is applied to the potential defects to reject false defects. Multiple layer correlation and automatic learning enhance and tailor detection rules during a ramp-up stage. There is a dramatic reduction of false and nuisance defects and a high sensitivity to critical defects. The highly robust method is not sensitive to factors such as metal grain structure and imperfect alignment. Automatic learning tailors the inspection system for a specific semiconductor surface desi…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.