Bus termination circuitry and methods for implementing the same
US6122689A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 13, 1998 |
| Grant date | Sep 19, 2000 |
| Priority date | — |
| Expiry date | May 13, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4086
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed is a host adapter having automatic termination, and a method for implementing the automatic termination. The host adapter includes a first connector for connecting to at least one external peripheral device and a second connector for connecting to at least one internal peripheral device. The host adapter further includes a termination system circuit that is coupled between the first connector and the second connector. The termination system circuit is configured to produce bit data that is indicative of whether a peripheral device is coupled to one or both of the first connector and the second connector. Preferably, the termination system circuit communicates the bit data to a software termination engine upon boot-up to enable or disable a termination of the host adapter. Furthermore, the termination system circuit includes a termination control decoder and a tri-state buffer. The host adapter also includes a termination over-ride control that is configured to over-ride the automatic termination generated by the termination system circuit via a software control.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.