Process for transmitting information bits with error correction coding and decoder for the implementation of this process
US6122763A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 28, 1997 |
| Grant date | Sep 19, 2000 |
| Priority date | — |
| Expiry date | Aug 28, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/6502
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The bits transmitted are coded according to the product of at least two systematic block codes. Iterative decoding is applied in order to determine, at each code word search step, a data matrix ({R}) and a decision matrix ({D}) used for the following step. The new decision matrix is determined at each step by decoding the lines or columns of the input matrix, and the new data matrix is determined taking into account the correction terms which increase the reliability of the decoding on each iteration. The coding and decoding circuits (17) are rendered programmable by a shortening technique allowing selection of the number k-X of non-redundant information bits per block to be coded. Known values are assigned to the other bits, the positions of which are uniformly distributed according to each dimension of the matrices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.