Semiconductor memory device with redundancy circuit having a reference resistance
US6125069A · kind A · utility
24Cited by
4References
32Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 19, 1999 |
| Grant date | Sep 26, 2000 |
| Priority date | — |
| Expiry date | Oct 19, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/835
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device with a redundancy circuit includes a reference section, a fuse section and a latch section. The reference section includes a reference resistance and supplies a first current to the reference resistance. The fuse section includes a fuse and supplies a second current to the fuse. The second current is proportional to the first current. The latch section has a threshold and latches a fuse state data based on the threshold and a voltage drop across the fuse. The fuse state data indicates whether or not the fuse is cut.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.