Single-chip microcomputer using adjustable timing to fetch data from an external memory
US6125431A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 9, 1997 |
| Grant date | Sep 26, 2000 |
| Priority date | — |
| Expiry date | Jun 9, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/7814
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
It is an object of the present invention to provide a one-chip microcomputer which permits the access time for an external memory to be equal to that for an internal memory. The one-chip microcomputer 10 includes an internal ROM 11, control circuit 12, output terminals 13, input terminals 14, control circuit 15, selector 16, instruction register 17, delay circuit 18, and fetch control signal select gate 19. For selection of the external ROM 30, a control arrangement 20 and a delay circuit 18 are employed in one embodiment to adjust the time at which ROM data is fetched by the instruction register 17, based on the delay time for accessing the external ROM 30.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.