Distributive encoder for encoding error signals which represent signal peak errors in data signals for correcting erroneous signal baseline conditions
US6125470A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 22, 1998 |
| Grant date | Sep 26, 2000 |
| Priority date | — |
| Expiry date | Oct 22, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/03019
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A digital signal error detection circuit and method for identifying interruptions in respective occurrences of opposing signal states of an equalized digital data signal. Signal level status signals are monitored during a specified monitoring time period to determine whether the data signal being monitored contains at least one positive data pulse and at least one negative data pulse. If this condition is not met, then an error signal is generated for use in correcting the equalization of the original data signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.