Process for producing electronic devices

US6127274A · kind A · utility

Assignee

• Micronas Intermetall GmbH · DE

Inventors

• Guenter Igel · Teningen, DE
• Martin Mall · Glückstadt, DE

Key dates

• Filing date: Feb 25, 1998
• Grant date: Oct 3, 2000
• Expiry date: Feb 25, 2018

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/12042
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

There is disclosed a process for producing electronic devices from a semiconductor wafer. The process comprises forming separation regions with a spatial pattern on the semiconductor wafer to provide separation between electronic devices, and depositing a conductive contact layer on the wafer and patterning the contact layer in such a way that conductive terminals extend from the front side of the wafer over at least part of the cross section of the patterned separation regions. The terminals are bared by removing material of the wafer in the semiconductor regions starting from the backside of the wafer, and the terminals of adjacent electronic devices are separated.