Semiconductor memory device
US6128210A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 16, 1999 |
| Grant date | Oct 3, 2000 |
| Priority date | — |
| Expiry date | Oct 16, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/126
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device includes a plurality of main bit lines; a first bank including a plurality of memory cells, a plurality of word lines, and a plurality of sub bit lines; a second bank including a plurality of memory cells, a plurality of word lines, and a plurality of sub bit lines which are independent from the plurality of sub bit lines included in the first bank; a first auxiliary conduction region coupled to one of the plurality of main bit lines; a first switch for electrically connecting the first auxiliary conduction region to a second auxiliary conduction region: and a second switch for electrically connecting one of the plurality of sub bit lines included in the first bank to the second auxiliary conduction region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.