Hybrid memory device
US6128218A · kind A · utility
11Cited by
6References
31Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 19, 1999 |
| Grant date | Oct 3, 2000 |
| Priority date | — |
| Expiry date | Aug 19, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/005
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A hybrid memory device according to the present invention has a RAM cell and a ROM cell that separately operate, and is capable of loading data in the ROM cell to the RAM cell. In such a hybrid memory device, to transfer the data in the ROM cell to common bit lines, transistors are respectively provided between the bit lines and the ROM cell. Accordingly, even when loading the data in the ROM cell to the RAM cell, the RAM and ROM cells can be separately operated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.