Semiconductor memory device
US6128223A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 23, 1999 |
| Grant date | Oct 3, 2000 |
| Priority date | — |
| Expiry date | Mar 23, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device includes a memory cell and first and second electrodes. The memory cell has a floating gate formed on a semiconductor substrate via a gate insulating film to be insulated from a remaining part, and a control gate formed on the floating gate via an isolation insulating film. The first electrode is formed on the floating gate via a first insulating film in a region of the floating gate except for a channel region for constituting the memory cell. The second electrode is formed on the floating gate via a second insulating film in a region of the floating gate except for the channel region for constituting the memory cell. When a predetermined voltage is applied to the first and second electrodes, a tunnel current flows through the first and second insulating films.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.