Simple bicmos process for creation of low trigger voltage SCR and zener diode pad protection
US6130117A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 19, 1998 |
| Grant date | Oct 10, 2000 |
| Priority date | — |
| Expiry date | May 19, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/713
Abstract
The present invention provides a semiconductor protection device in a substrate having a first type of conductivity. The semiconductor protection device includes two vertical bipolar transistors. A well region is located within the substrate having a second type of conductivity with a base region within the well region having a first type of conductivity. A first doped region having the second type of conductivity and a second doped region having a first type of conductivity are located within the well region. A third doped region having the second type of conductivity and a fourth doped region having the first type of conductivity are located within the base region. A doped region having a first type of conductivity is located within the substrate. This doped region is connected to the fourth doped region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.