Architecture for dual-chip integrated circuit package and method of manufacturing the same
US6133067A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 26, 1998 |
| Grant date | Oct 17, 2000 |
| Priority date | — |
| Expiry date | Mar 26, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/1815
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An architecture for a dual-chip IC package and a method of manufacturing the same are provided. The dual-chip IC package allows two chips to be mounted on the same leadframe in the same package. The two chips can be either the same type of a semiconductor device or two different types of semiconductor devices with different functions such as a memory chip and a logic control chip. The architecture allows a simplified manufacturing process and an increased good yield rate for the two IC chips that are to be enclosed in the dual-chip IC package. Moreover, the dual-chip IC package can be manufactured with existing packaging equipment and processes, so that it can be realized without having to invest on and install additional ones.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.