Method and apparatus for efficient implementation of a multirate LMS filter
US6134570A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 11, 1998 |
| Grant date | Oct 17, 2000 |
| Priority date | — |
| Expiry date | May 11, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H21/0012
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An efficient implementation of a multirate filter with delayed error feedback prevents an instruction processing rate requirement from increasing by performing interpolation and decimation in a LMS filter element at the same time. The multirate filter calculates an ith coefficient value, wherein i is a set of consecutive integers, by obtaining an (i-1)th error value, obtaining an (i-1)th data value, multiplying the (i-1)th error value and the (i-1)th data value to obtain an ith coefficient product, obtaining Mth coefficient value from a coefficient register, wherein M is a predetermined integer, adding the Mth coefficient value to the ith coefficient product to obtain an ith coefficient value calculating an ith data value by multiplying the (i-1)th data value and the Mth coefficient value to produce ith convolution product, and adding an (i-1)th convolution sum to the ith convolution product to produce an ith convolution sum. Obtaining of the Mth coefficient value decimates the convolution product by M and interpolates the error value by M. Obtaining of the (i-1)th data value further includes incrementing a data register by one when new data is not written into the data register.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.