Method and apparatus of resolving a deadlock by collapsing writebacks to a memory
US6134635A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 9, 1997 |
| Grant date | Oct 17, 2000 |
| Priority date | — |
| Expiry date | Dec 9, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/161
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method used by a first memory controller to prevent deadlock of requests to a memory having a first memory line is disclosed. The method includes the steps of (1) receiving a first memory request for the first memory line from a first bus, (2) receiving a second memory request for the first memory line from a second bus, (3) propagating the first memory request through to the second bus after the second memory request receiving step, (4) processing the second memory request by storing a first modified copy of the first memory line in the first memory controller, and (5) processing the first memory request by (a) storing a second modified copy of the first memory line in the first memory controller, and (b) transferring the second modified copy of the first memory line to a caching agent in order to satisfy the first memory request.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.