Latch-up controllable insulated gate bipolar transistor
US6137122A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 2, 1999 |
| Grant date | Oct 24, 2000 |
| Priority date | — |
| Expiry date | Dec 2, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D18/655
Abstract
A latch-up controllable insulated gate bipolar transistor is formed with a thyristor structure, which has a first region of a first conductivity type, a second region of a second conductivity type formed on the first region, a third region of the first conductivity type formed on the second region, and a fourth region of the second conductivity type contacting the third region and forming a P-N junction therewith. The first and third regions contact a first and second electrode regions respectively. A first field effect transistor means for controlling conduction between the fourth region and the second region in response to an actuation bias; and a second field effect transistor means between the fourth region and the second electrode region for turning the thyristor off in response to a cutoff bias. The insulated gate bipolar transistor of the present invention are latch-up controllable, of a high voltage withstand and of a lower forward voltage drop simultaneously
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.