Low voltage drop integrated analog amplifier without external compensation network
US6137364A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 25, 1999 |
| Grant date | Oct 24, 2000 |
| Priority date | — |
| Expiry date | Jan 25, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F3/3093
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An integrated amplifier includes a differential input stage including a first pair of bipolar junction transistors. A reference bias current generator biases the differential input stage with a reference bias current. A first and a second current mirror circuit drives a respective transistor of the first pair of bipolar junction transistors. Each of the first and second current mirror circuits includes a transistor having a base terminal connected to an intermediate node. An integrated resistor is connected to the intermediate node and is in series with the respective transistor of the first pair of bipolar junction transistors. The reference bias current of the differential input stage conducts through the integrated resistor. The reference bias current corresponds to a ratio between a base emitter junction voltage and a resistance of the integrated resistor. An output stage includes a second pair of bipolar junction transistors, which are controlled by a respective transistor of the first and second current mirror circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.