Circuit and method for attenuating noise in a data converter
US6137429A · kind A · utility
18Cited by
8References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 8, 1999 |
| Grant date | Oct 24, 2000 |
| Priority date | — |
| Expiry date | Mar 8, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/50
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A data converter (10) and a method for attenuating noise in an output signal generated by the data converter (10). The data converter (10) includes a sigma-delta modulator (16), a digital-to-analog converter (17), a clock generator (19) connected to the digital-to-analog converter (17), and a clock control circuit (18) connected to the clock generator (19). The clock control circuit (18) enables or disables the clock generator (19) in accordance with the single-bit digital signal to cause a notch characteristic in the output signal for attenuating noise in the output signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.