Process of forming a semiconductor capacitor including forming a hemispherical grain statistical mask with silicon and germanium
US6140177A · kind A · utility
8Cited by
8References
5Claims
0Family size
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Key dates
| Filing date | Feb 9, 1999 |
| Grant date | Oct 31, 2000 |
| Priority date | — |
| Expiry date | Feb 9, 2019 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/947
Abstract
For manufacturing a capacitor that is essentially suited for DRAM arrangements, column structures that form an electrode of the capacitor are etched upon employment of a statistical mask that is produced without lithographic steps by nucleus formation of Si/Ge and subsequent selective epitaxy. Structure sizes below 100 nm can be realized in the statistical mask. Surface enlargement factors up to 60 are thus achieved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.