Method and arrangement of a buried capacitor, and a buried capacitor arranged according to said method
US6140199A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 4, 1998 |
| Grant date | Oct 31, 2000 |
| Priority date | — |
| Expiry date | Jun 4, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/665
Abstract
The present invention relates to a method for arrangement of a buried capacitor on a substrate or the like, and a buried capacitor arranged according to the method. In order to diminish the resistive losses in a capacitor and to make it more efficient, in semi-conductor circuits, instead of the polycrystalline layer, one or more bodies of metal such as aluminum or tungsten may be used. This has been made possible using a new technique in which a trench filling of conducting material is etched away without removal through etching of the insulating layer in the trench. After the removal through etching of the trench filling, the trench is filled using the metal as above, whereby the insulating layer between the conducting material and the metal body will separate two conducting surfaces, thereby forming the buried capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.