Phase lock loop enabling smooth loop bandwidth switching
US6140882A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 23, 1998 |
| Grant date | Oct 31, 2000 |
| Priority date | — |
| Expiry date | Nov 23, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/1972
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present invention, generally speaking, provides a PLL that enables smooth switching of loop bandwidth without changing the loop filter. In accordance with one aspect of the invention, the loop bandwidth of a phase lock loop including an output frequency divider and a reference frequency divider is changed by changing a divisor of the output frequency divider by a factor and changing a divisor of the reference frequency divider by substantially the same factor. If the factor is greater than one, the loop bandwidth is decreased. If the factor is less than one, then the loop bandwidth is increased. In accordance with another aspect of the invention, a phase lock loop includes an oscillator having a control input, a phase comparator, a loop filter, and a feedback path including an output frequency divider. A reference frequency divider is also provided. A controller is coupled to the output frequency divider and to the reference frequency divider for changing a divisor of each at substantially the same time in response to a bandwidth select signal. The controller changes the divisors by substantially the same factor, changing the loop bandwidth without affecting the output frequenc…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.