Image generating apparatus with FIFO memory and cache memory
US6141025A · kind A · utility
19Cited by
6References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 2, 1998 |
| Grant date | Oct 31, 2000 |
| Priority date | — |
| Expiry date | Feb 2, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2360/121
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Data from a main part of a drawing engine 101 is sent to and transiently stored in a first-in-first-out (FIFO) memory 102 for storage transiently therein and is supplied via an operating device 103 to a fast cache memory 104 where data exchange is carried out with a frame buffer 105. A cache controller 106 controls the cache memory 104 for pre-reading the contents of the FIFO memory 102 and collectively reading/writing data of the same page in the frame buffer 105 which is accessible at a high speed. This enables fast accessing using an inexpensive frame buffer to improve the drawing speed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.