Valley-fill power factor correction circuit
US6141230A · kind A · utility
10Cited by
7References
13Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 13, 1998 |
| Grant date | Oct 31, 2000 |
| Priority date | — |
| Expiry date | Jul 13, 2018 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B70/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A valley-fill power factor correction circuit includes a rectifying circuit connected to a charge storage circuit. There is a voltage doubler circuit disposed between the rectifying circuit and the charge storage circuit. The voltage doubler circuit performs the function of filling the normally truncated input current waveform. As arranged, the input current waveform can be substantially maintained with less distortion resulting in a Fourier transform in compliance with the IEC specifications. The valley-fill circuit of the invention is capable of achieving a high power factor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.