Apparatus and method for static random access memory array
US6141240A · kind A · utility
16Cited by
4References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 14, 1999 |
| Grant date | Oct 31, 2000 |
| Priority date | — |
| Expiry date | Sep 14, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/417
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A static random access memory array (200) with power supplies and an array biasing scheme is disclosed. A power supply (202) has an output voltage that is applied to the bitlines (40). The output voltage pre-charges the bitlines (40) to read from the memory cells (10). An array power supply (204) has an array voltage that is applied to the memory cells. The array voltage is higher than the output voltage. The array power supply (204) is drived by boosting the output voltage of the power supply (202).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.