Digital downconverter/despreader for direct sequence spread spectrum CDMA communications system
US6141372A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 4, 1997 |
| Grant date | Oct 31, 2000 |
| Priority date | — |
| Expiry date | Dec 4, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/7085
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A system for digitally downconverting and despreading a multi-channel analog direct sequence spread spectrum signal is provided. The system includes a free-running, non-steering, clock generator which outputs an A/D sample clock, and an A/D sample clock having a rate which is an integral multiple of a chip rate of the spread spectrum signal. An A/D converter which receives the spread spectrum signal and the A/D sample clock and outputs a digitized multi-channel signal from the multi-channel spread spectrum signal, and a local pseudo-noise sequence signal source which outputs M local pseudo-noises, wherein M is an integer greater that 1 is also included. A multi-channel complex downconverter/polyphase filter which receives the digitized multi-channel signal and the A/D sample clock and a sample timing phase control signals, simultaneously filters and downconverts the digitized multi-channel signal to baseband, corrects timing phase misalignment between the digitized multi-channel signal and the locally generated pseudo-noise sequences, and outputs a multi-channel complex corrected baseband signal is provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.