Reducing the hardware cost of a bank of multipliers by combining shared terms
US6141674A · kind A · utility
8Cited by
5References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 10, 1998 |
| Grant date | Oct 31, 2000 |
| Priority date | — |
| Expiry date | Jun 10, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/5332
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit that performs the function of a bank of multipliers while reducing hardware costs includes shared term generator that generates a set of shared terms in response to an input value. The circuit further includes a set of combining circuits each of which generates a result term by combining one or more of the shared terms so that the result term equals the input value multiplied by a corresponding data value. The circuit generates the share terms once and then reuses the shared terms in differing combining circuits as needed thereby eliminating duplication of terms and associated implementation hardware.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.