Monolithically-integrated static random access memory device
US6144073A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 13, 1999 |
| Grant date | Nov 7, 2000 |
| Priority date | — |
| Expiry date | May 13, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B10/12
Abstract
A monolithically-integrated SRAM cell is described for reducing the cell size, i.e., at least two of a plurality of transistors comprising the SRAM cell are monolithically integrated to define a first transistor and a second transistor, wherein the drain of the first transistor functions as the gate of the second transistor and the drain of the second transistor functions as the gate of the first transistor. This integration eliminates the need for gate-to-drain connections of previous devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.